Affiliation:
1. Tsinghua University, Beijing, China
2. Qualcomm
Abstract
Ray tracing has long been considered as the next-generation technology for graphics rendering. Recently, there has been strong momentum to adopt ray tracing--based rendering techniques on consumer-level platforms due to the inability of further enhancing user experience by increasing display resolution. On the other hand, the computing workload of ray tracing is still overwhelming. A 10-fold performance gap has to be narrowed for real-time applications, even on the latest graphics processing units (GPUs). As a result, hardware acceleration techniques are critical to delivering a satisfying level performance while at the same time meeting an acceptable power budget. A large body of research on ray-tracing hardware has been proposed over the past decade. This article is aimed at providing a timely survey on hardware techniques to accelerate the ray-tracing algorithm. First, a quantitative profiling on the ray-tracing workload is presented. We then review hardware techniques for the main functional blocks in a ray-tracing pipeline. On such a basis, the ray-tracing microarchitectures for both ASIC and processors are surveyed by following a systematic taxonomy.
Funder
China National Science Foundation
Publisher
Association for Computing Machinery (ACM)
Subject
General Computer Science,Theoretical Computer Science
Cited by
35 articles.
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