Automatic measurement of memory hierarchy parameters

Author:

Yotov Kamen1,Pingali Keshav1,Stodghill Paul1

Affiliation:

1. Cornell University, Ithaca, NY

Abstract

The running time of many applications is dominated by the cost of memory operations. To optimize such applications for a given platform, it is necessary to have a detailed knowledge of the memory hierarchy parameters of that platform. In practice, this information is poorly documented if at all. Moreover, there is growing interest in self-tuning, autonomic software systems that can optimize themselves for different platforms; these systems must determine memory hierarchy parameters automatically without human intervention.One solution is to use micro-benchmarks to determine the parameters of the memory hierarchy. In this paper, we argue that existing micro-benchmarks are inadequate, and present novel micro-benchmarks for determining parameters of all levels of the memory hierarchy, including registers, all data caches and the translation look-aside buffer. We have implemented these micro-benchmarks in a tool called X-Ray that can be ported easily to new platforms. We present experimental results that show that X-Ray successfully determines memory hierarchy parameters on current platforms, and compare its accuracy with that of existing tools.

Publisher

Association for Computing Machinery (ACM)

Subject

Computer Networks and Communications,Hardware and Architecture,Software

Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Optimizing Coherence Traffic in Manycore Processors Using Closed-Form Caching/Home Agent Mappings;IEEE Access;2021

2. nanoBench: A Low-Overhead Tool for Running Microbenchmarks on x86 Systems;2020 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS);2020-08

3. Effect of Distributed Directories in Mesh Interconnects;Proceedings of the 56th Annual Design Automation Conference 2019;2019-06-02

4. uops.info;Proceedings of the Twenty-Fourth International Conference on Architectural Support for Programming Languages and Operating Systems;2019-04-04

5. Simulating the Network Activity of Modern Manycores;IEEE Access;2019

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