Work-in-Progress: Flexible bus arbitration in mixed criticality systems

Author:

Radulescu Vlad1ORCID,Cheng Albert Mo Kim23ORCID,Andrei Stefan4ORCID

Affiliation:

1. Department of Computer Science, A. I. Cuza University, Iasi, Iasi, Romania

2. Department of Computer Science, University of Houston, Houston, Texas, USA

3. Electrical and Computer Engineering, University of Houston, Houston, Texas, USA

4. Department of Computer Systems Engineering Technology, Oregon Institute of Technology, Klamath Falls, Oregon, USA

Publisher

ACM

Reference5 articles.

1. Giovani Gracioli, Rohan Tabish, Renato Mancuso, Reza Mirosanlou, Rodolfo Pellizzoni, and Marco Caccamo. 2019. Designing Mixed Criticality Applications on Modern Heterogeneous MPSoC Platforms. In Proceedings of Euromicro Conference on Real-Time Systems (ECRTS 2019), 24:1--24:23.

2. Is Your Bus Arbiter Really Fair? Restoring Fairness in AXI Interconnects for FPGA SoCs

3. Criticality- and Requirement-Aware Bus Arbitration for Multi-Core Mixed Criticality Systems

4. Real-Time Virtual Machines for Avionics Software Porting and Development

5. Optimizing Tunable WCET with Shared Resource Allocation and Arbitration in Hard Real-Time Multicore Systems

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