Easy Formal Specification and Validation of Unbounded Networks-on-Chips Architectures

Author:

Verbeek Freek1,Schmaltz Julien2

Affiliation:

1. Radboud University Nijmegen

2. Open University of The Netherlands

Abstract

This article presents a formal specification and validation environment to prove safety and liveness properties of parametric -- unbounded -- NoCs architectures described at a high-level of abstraction. The environment improves the GeNoC approach with two new theorems, proving evacuation and starvation freedom. The application of the validation methodology is illustrated on a HERMES NoC with adaptive west-first routing and wormhole switching. This case study illustrates the strong compositional aspect of the GeNoC environment. The complete specification of this HERMES instance, together with the proof that the specification is deadlock-free, starvation free, and all messages eventually leave the network at their correct destination, could be achieved in about a week. Approximately 86% of this proof is automatically derived from the GeNoC model.

Funder

Nederlandse Organisatie voor Wetenschappelijk Onderzoek

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Computer Science Applications

Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Scaling Up Livelock Verification for Network-on-Chip Routing Algorithms;Lecture Notes in Computer Science;2022

2. Accelerating NoC Verification Using a Complete Model and Active Window;IEEE Access;2022

3. Formal Modeling of Network-on-Chip Using CFSM and its Application in Detecting Deadlock;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2020-04

4. Executable Micro-Architecture Modeling and Automatic Verification of EtherCAT;2018 IEEE SmartWorld, Ubiquitous Intelligence & Computing, Advanced & Trusted Computing, Scalable Computing & Communications, Cloud & Big Data Computing, Internet of People and Smart City Innovation (SmartWorld/SCALCOM/UIC/ATC/CBDCom/IOP/SCI);2018-10

5. Formal Proof of the Dependable Bypassing Routing Algorithm Suitable for Adaptive Networks on Chip QnoC Architecture;Systems;2017-02-22

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