Partial evaluation of machine code

Author:

Srinivasan Venkatesh1,Reps Thomas2

Affiliation:

1. University of Wisconsin-Madison, USA

2. University of Wisconsin-Madison, USA / GrammaTech, USA

Funder

Air Force Research Laboratory

Rajiv and Ritu Batra

UW-Madison Office of the Vice Chancellor for Research and Graduate Education

Wisconsin Alumni Research Foundation

Defense Advanced Research Projects Agency

National Science Foundation

Publisher

ACM

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Binary Control-Flow Trimming;Proceedings of the 2019 ACM SIGSAC Conference on Computer and Communications Security;2019-11-06

2. Scaling symbolic evaluation for automated verification of systems code with Serval;Proceedings of the 27th ACM Symposium on Operating Systems Principles;2019-10-27

3. SPEjs: a symbolic partial evaluator for JavaScript;Proceedings of the 1st International Workshop on Advances in Mobile App Analysis;2018-09-04

4. Model-assisted machine-code synthesis;Proceedings of the ACM on Programming Languages;2017-10-12

5. Control Dependencies in Interpretive Systems;Runtime Verification;2017

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