Using integer sets for data-parallel program analysis and optimization

Author:

Adve Vikram1,Mellor-Crummey John1

Affiliation:

1. Department of Computer Science, Rice University

Abstract

In this paper, we describe our experience with using an abstract integer-set framework to develop the Rice dHPF compiler, a compiler for High Performance Fortran. We present simple, yet general formulations of the major computation partitioning and communication analysis tasks as well as a number of important optimizations in terms of abstract operations on sets of integer tuples. This approach has made it possible to implement a comprehensive collection of advanced optimizations in dHPF, and to do so in the context of a more general computation partitioning model than previous compilers. One potential limitation of the approach is that the underlying class of integer set problems is fundamentally unable to represent HPF data distributions on a symbolic number of processors. We describe how we extend the approach to compile codes for a symbolic number of processors, without requiring any changes to the set formulations for the above optimizations. We show experimentally that the set representation is not a dominant factor in compile times on both small and large codes. Finally, we present preliminary performance measurements to show that the generated code achieves good speedups for a few benchmarks. Overall, we believe we are the first to demonstrate by implementation experience that it is practical to build a compiler for HPF using a general and powerful integer-set framework.

Publisher

Association for Computing Machinery (ACM)

Subject

Computer Graphics and Computer-Aided Design,Software

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A constraint-based approach to automatic data partitioning for distributed memory execution;Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis;2019-11-17

2. Communication Avoiding Algorithms: Analysis and Code Generation for Parallel Systems;2015 International Conference on Parallel Architecture and Compilation (PACT);2015-10

3. Code Generation for Distributed-Memory Architectures;The Computer Journal;2015-09-15

4. Automatic data allocation and buffer management for multi-GPU machines;ACM Transactions on Architecture and Code Optimization;2013-12

5. Compiling affine loop nests for distributed-memory parallel architectures;Proceedings of the International Conference on High Performance Computing, Networking, Storage and Analysis;2013-11-17

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