Twin-Load

Author:

Cui Zehan1,Lu Tianyue2,McKee Sally A.3,Chen Mingyu1,Pan Haiyang2,Ruan Yuan1

Affiliation:

1. State Key Laboratory of Computer Architecture, Institute of Computing Technology, CAS

2. State Key Laboratory of Computer Architecture, Institute of Computing Technology, CAS and University of Chinese Academy of Sciences

3. Chalmers University of Technology

Publisher

ACM

Reference62 articles.

1. JEDEC : Global standards for the microelectronics industry. http://www.jedec.org. JEDEC: Global standards for the microelectronics industry. http://www.jedec.org.

2. The LLVM compiler infrastructure. http://llvm.org/. The LLVM compiler infrastructure. http://llvm.org/.

3. Memcached --- a distributed memory object caching system. http://memcached.org/. Memcached --- a distributed memory object caching system. http://memcached.org/.

4. NAS Parallel Benchmarks. http://www.nas.nasa.gov/publications/npb.html. NAS Parallel Benchmarks. http://www.nas.nasa.gov/publications/npb.html.

5. NU-Minebench. http://cucis.ece.northwestern.edu/projects/DMS/MineBench.html. NU-Minebench. http://cucis.ece.northwestern.edu/projects/DMS/MineBench.html.

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Polling-Based Memory Interface;ACM Transactions on Design Automation of Electronic Systems;2022-12-02

2. POMI: Polling-Based Memory Interface for Hybrid Memory System;2021 IEEE 39th International Conference on Computer Design (ICCD);2021-10

3. Architecting a hardware-managed hybrid DIMM optimized for cost/performance;Proceedings of the International Symposium on Memory Systems;2018-10

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