FPGA acceleration of deep reinforcement learning using on-chip replay management

Author:

Meng Yuan1,Zhang Chi1,Prasanna Viktor1

Affiliation:

1. University of Southern California

Publisher

ACM

Reference41 articles.

1. Greg Brockman Vicki Cheung Ludwig Pettersson Jonas Schneider John Schulman Jie Tang and Wojciech Zaremba. 2016. OpenAI Gym. arXiv:arXiv:1606.01540 Greg Brockman Vicki Cheung Ludwig Pettersson Jonas Schneider John Schulman Jie Tang and Wojciech Zaremba. 2016. OpenAI Gym. arXiv:arXiv:1606.01540

2. Black-box data-efficient policy search for robotics

3. FA3C

4. BlastFunction: A Full-stack Framework Bringing FPGA Hardware Acceleration to Cloud-native Applications

5. Utilizing cloud FPGAs towards the open neural network standard

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3. DQN Algorithm Design for Fast Efficient Shortest Path System;2023 Asia Pacific Signal and Information Processing Association Annual Summit and Conference (APSIPA ASC);2023-10-31

4. A Framework for Mapping DRL Algorithms With Prioritized Replay Buffer Onto Heterogeneous Platforms;IEEE Transactions on Parallel and Distributed Systems;2023-06

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