Energy-Proportional Photonic Interconnects

Author:

Demir Yigit1,Hardavellas Nikos2

Affiliation:

1. Intel, Ave, Hillsboro, OR

2. Northwestern University, Evanston, IL

Abstract

Photonic interconnects have emerged as the prime candidate technology for efficient networks on chip at future process nodes. However, the high optical loss of many nanophotonic components coupled with the low efficiency of current laser sources results in exceedingly high total power requirements for the laser. As optical interconnects stay on even during periods of system inactivity, most of this power is wasted, which has prompted research on laser gating. Unfortunately, prior work has been complicated by the long laser turn-on delays and has failed to deliver the full savings. In this article, we propose ProLaser, a laser control mechanism that monitors the requests sent on the interconnect, the cache, and the coherence directory to detect highly correlated events and turn on proactively the lasers of a photonic interconnect. While ProLaser requires fast lasers with a turn-on delay of a few nanoseconds, a technology that is still experimental, several types of such lasers that are suitable for power gating have already been manufactured over the last decade. Overall, ProLaser saves 42% to 85% of the laser power, outperforms the current state of the art by 2× on average, and closely tracks (within 2%--6%) a perfect prediction scheme with full knowledge of future interconnect requests. Moreover, the power savings of ProLaser allow the cores to exploit a higher-power budget and run faster, achieving speedups of 1.5 to 1.7× (1.6× on average).

Funder

National Science Foundation under CAREER

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Information Systems,Software

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Practical Shared Optical Cache With Hybrid MWSR/R-SWMR NoC for Multicore Processors;ACM Journal on Emerging Technologies in Computing Systems;2022-10-13

2. Enabling scalable chiplet-based uniform memory architectures with silicon photonics;Proceedings of the International Symposium on Memory Systems;2019-09-30

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