Affiliation:
1. Indian Institute of Technology Delhi, India
2. Intel Architecture Group, Intel, India
Abstract
Modern multi-processor systems-on-chip (MPSoCs) are characterized by caches shared by multiple cores. These shared caches receive
requests
issued by the processor cores. Requests that are subject to cache misses may result in the generation of
responses
. These responses are received from the lower level of the memory hierarchy and written to the cache. The outstanding requests and responses contend for the shared cache bandwidth. To mitigate the impact of the cache bandwidth contention on the overall system performance, an efficient request and response arbitration policy is needed.
Research on shared cache management has neglected the additional cache contention caused by responses, which are written to the cache. We propose
CABARRE
, a novel request and response arbitration policy at shared caches, so as to improve the overall system performance.
CABARRE
shows a performance improvement of 23% on average across a set of SPEC workloads compared to straightforward adaptations of state-of-the-art solutions.
Funder
Semiconductor Research Corporation
Publisher
Association for Computing Machinery (ACM)
Subject
Hardware and Architecture,Software
Cited by
1 articles.
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