GATSPI

Author:

Zhang Yanqing1,Ren Haoxing1,Sridharan Akshay1,Khailany Brucek1

Affiliation:

1. NVIDIA Corporation

Publisher

ACM

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Gate-Level Power Estimation Approach with a Comprehensive Definition of Thresholds for Classification and Filtering of Inertial Glitch Pulses;Journal of Low Power Electronics and Applications;2024-08-05

2. CPGPUSim: A Multi-dimensional Parallel Acceleration Framework for RTL Simulation;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10

3. Toward Early Stage Dynamic Power Estimation: Exploring Alternative Machine Learning Methods and Simulation Schemes;2024 25th International Symposium on Quality Electronic Design (ISQED);2024-04-03

4. Invited Paper: Heterogeneous Acceleration for Design Rule Checking;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

5. General-Purpose Gate-Level Simulation with Partition-Agnostic Parallelism;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09

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