1. Mapping Enumeration for Multi-Context CGRAs Using Zero-Suppressed Binary Decision Diagrams;2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2024-05-05
2. A Unified Memory Dependency Framework for Speculative High-Level Synthesis;Proceedings of the 33rd ACM SIGPLAN International Conference on Compiler Construction;2024-02-17
3. Introducing software pipelining for the A64FX processor into LLVM;Proceedings of the International Conference on High Performance Computing in Asia-Pacific Region Workshops;2024-01-11
4. High-Level Synthesis;FPGA EDA;2024
5. HL-Pow: Learning-Assisted Pre-RTL Power Modeling and Optimization for FPGA HLS;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11