Random modulo

Author:

Hernandez Carles1,Abella Jaume2,Gianarro Andrea1,Andersson Jan1,Cazorla Francisco J.3

Affiliation:

1. Cobham Gaisler, Gothenburg (Sweden)

2. Barcelona Supercomputing Center (BSC-CNS), Barcelona (Spain)

3. Barcelona Supercomputing Center (BSC-CNS), Barcelona (Spain) and Spanish National Research Council (IIIA-CSIC), Barcelona (Spain)

Funder

SpanishMinistry of Econ- omy and Competitiveness

Seventh Framework Programme

Publisher

ACM

Reference27 articles.

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Use of Measurements in Worst-Case Execution Time Estimation for Real-Time Systems;2021 XI Brazilian Symposium on Computing Systems Engineering (SBESC);2021-11-22

2. RDMM: Runtime dynamic migration mechanism of distributed cache for reconfigurable array processor;Integration;2020-05

3. Towards limiting the impact of timing anomalies in complex real-time processors;Proceedings of the 24th Asia and South Pacific Design Automation Conference;2019-01-21

4. Cache side-channel attacks and time-predictability in high-performance critical real-time systems;Proceedings of the 55th Annual Design Automation Conference;2018-06-24

5. RPR;Proceedings of the 33rd Annual ACM Symposium on Applied Computing;2018-04-09

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