RippleFPGA
Author:
Affiliation:
1. The Chinese University of Hong Kong, NT, Hong Kong
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2966986.2980084
Reference19 articles.
1. Xilinx inc. http://www.xilinx.com. Xilinx inc. http://www.xilinx.com.
2. Recent directions in netlist partitioning: a survey
3. Towards scalable placement for FPGAs
4. Improving Timing-Driven FPGA Packing with Physical Information
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1. AMF-Placer 2.0: Open-Source Timing-Driven Analytical Mixed-Size Placer for Large-Scale Heterogeneous FPGA;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-09
2. GOLDS: Genetic Algorithm-based Optimization of Custom FPGA Architecture Layout Design for Secure Silicon;Proceedings of the Great Lakes Symposium on VLSI 2024;2024-06-12
3. OpenPARF 3.0: Robust Multi-Electrostatics Based FPGA Macro Placement Considering Cascaded Macros Groups and Fence Regions;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
4. Multielectrostatic FPGA Placement Considering SLICEL–SLICEM Heterogeneity, Clock Feasibility, and Timing Optimization;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2024-02
5. Physical Implementation;FPGA EDA;2024
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