Stencil codes on a vector length agnostic architecture-Reference-Cited by-同舟云学术

Stencil codes on a vector length agnostic architecture

Published:2018-11 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques
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Author:

Armejach Adrià¹,Caminal Helena²,Cebrian Juan M.³,González-Alberquilla Rekai⁴,Adeniyi-Jones Chris⁴,Valero Mateo³,Casas Marc³,Moretó Miquel³

Affiliation:

1. Universitat Politécnica de Catalunya

2. Cornell University

3. Barcelona Supercomputing Center

4. Arm, Cambridge, UK

Funder

Ministerio de Economía y Competitividad

Horizon 2020 Framework Programme

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3243176.3243192

Reference30 articles.

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3. Intel Corporation. 2016. Intel Architecture Instruction Set Extensions Programming Reference. https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf Intel Corporation. 2016. Intel Architecture Instruction Set Extensions Programming Reference. https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf

4. A Multilevel Parallelization Framework for High-Order Stencil Computations

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