Per-bank refresh with adaptive early termination for high density DRAM

Author:

Yang Hyun-Woong1,Lee Min-Kyu1,Chung Ki-Seok1

Affiliation:

1. Hanyang University, Seoul, Republic of Korea

Funder

Development of free-running speech recognition technologies for embedded robot system

Publisher

ACM Press

Reference7 articles.

1. Kim, K., and Lee, J. 2006. A New Investigation of Data Retention Time in Truly Nanoscaled DRAMs. IEEE Electron Device Letter, vol. 30 (July. 2009), 846--848.

2. Agrawal, A., O'connor, M., Bolotin, E., Chatterjee, N., Emer, J., and Keckler, S. 2016. CLARA: Circular Linked-List Auto and Self Refresh Architecture. MEMSYS'16 (Oct. 2016), 338--349.

3. Lee, M. K., and Chung, K. S. 2018. Early termination refresh to reduce refresh overhead. IET Electronics Letter, vol. 54 (Feb. 2018), 142--144.

4. Binkert, N., Beckmann, B., Black, G., Reinhardt, S. K., Saidi, A., Basu, A., Hestness, J., Hower, D. R., Krishna, T., Sardashti, S., Sen, R., Sewell, K., Shoaib, M., Vaish, N., Hill, M. D., and Wood, D. A. 2011. The Gem5 simulator. ACM SIGARCH Computer Architecture News, vol. 39 (May. 2011), 1--7.

5. Rosenfeld, P., Balis, E. C., and Jacob, B. 2011. DRAMSim2: A Cycle Accurate Memory System Simulator. IEEE Computer Architecture Letter, vol. 10 (Jan. 2011), 16--19.

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