Vectorisation avoidance

Author:

Keller Gabriele1,Chakravarty Manuel M.T.1,Leshchinskiy Roman2,Lippmeier Ben1,Peyton Jones Simon3

Affiliation:

1. University of New South Wales, Sydney, Australia

2. Not affiliated, London, United Kingdom

3. Microsoft Research Ltd, Cambridge, United Kingdom

Abstract

Flattening nested parallelism is a vectorising code transform that converts irregular nested parallelism into flat data parallelism. Although the result has good asymptotic performance, flattening thoroughly restructures the code. Many intermediate data structures and traversals are introduced, which may or may not be eliminated by subsequent optimisation. We present a novel program analysis to identify parts of the program where flattening would only introduce overhead, without appropriate gain. We present empirical evidence that avoiding vectorisation in these cases leads to more efficient programs than if we had applied vectorisation and then relied on array fusion to eliminate intermediates from the resulting code.

Publisher

Association for Computing Machinery (ACM)

Subject

Computer Graphics and Computer-Aided Design,Software

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Accelerating Nested Data Parallelism: Preserving Regularity;Euro-Par 2020: Parallel Processing;2020

2. Data-parallel flattening by expansion;Proceedings of the 6th ACM SIGPLAN International Workshop on Libraries, Languages and Compilers for Array Programming;2019-06-08

3. Incremental flattening for nested data parallelism;Proceedings of the 24th Symposium on Principles and Practice of Parallel Programming;2019-02-16

4. Streaming irregular arrays;ACM SIGPLAN Notices;2017-10-31

5. Streaming irregular arrays;Proceedings of the 10th ACM SIGPLAN International Symposium on Haskell;2017-09-07

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