RRS cache
Author:
Affiliation:
1. Southeast University, China
Funder
the Provincial Natural Science Foundation of Jiangsu Province
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3357526.3357535
Reference17 articles.
1. Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits
2. An 8T-SRAM for Variability Tolerance and Low-Voltage Operation in High-Performance Caches
3. Calhoun B H Chandrakasan A P. A 256-kb 65-nm sub-threshold SRAM design for ultra-low-voltage operation[J]. IEEE journal of solid-state circuits 2007 42(3): 680--688. Calhoun B H Chandrakasan A P. A 256-kb 65-nm sub-threshold SRAM design for ultra-low-voltage operation[J]. IEEE journal of solid-state circuits 2007 42(3): 680--688.
4. A 160 mV Robust Schmitt Trigger Based Subthreshold SRAM
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