Resource and data optimization for hardware implementation of deep neural networks targeting FPGA-based edge devices

Author:

Liu Xinheng1,Kim Dae Hee1,Wu Chang2,Chen Deming1

Affiliation:

1. University of Illinois at Urbana Champaign

2. Fudan University

Publisher

ACM

Reference24 articles.

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2. CALYPTO. Catapult C Synthesis. http://www.calypto.com/catapult-c-synthesis.php. CALYPTO. Catapult C Synthesis. http://www.calypto.com/catapult-c-synthesis.php.

3. Altera. OpenCL SDK. https://www.altera.com/products/design-software/embedded-software-developers/opencl/overview.html. Altera. OpenCL SDK. https://www.altera.com/products/design-software/embedded-software-developers/opencl/overview.html.

4. LegUp

5. FCUDA: Enabling efficient compilation of CUDA kernels onto FPGAs

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