InterPRET: a Time-predictable Multicore Processor

Author:

Jellum Erling R.1ORCID,Lin Shaokai2ORCID,Donovan Peter2ORCID,Jerad Chadlia3ORCID,Wang Edward4ORCID,Lohstroh Marten2ORCID,Lee Edward A.2ORCID,Schoeberl Martin5ORCID

Affiliation:

1. Norwegian University of Science and Technology, Norway

2. University of California, Berkeley, United States of America

3. University of Manouba, Tunisia

4. Massachusetts Institute of Technology, United States of America

5. Technical University of Denmark, Denmark

Funder

Research Council of Norway

National Science Foundation

Publisher

ACM

Reference25 articles.

1. A disruptive computer design idea: Architectures with repeatable timing

2. Stephen  A. Edwards and Edward A. Lee. 2007 . The Case for the Precision Timed (PRET) Machine. In Design Automation Conference (DAC). Stephen A. Edwards and Edward A. Lee. 2007. The Case for the Precision Timed (PRET) Machine. In Design Automation Conference (DAC).

3. Jon Perez Cerrolaza et. al.2020. Multi-Core Devices for Safety-Critical Systems: A Survey. ACM Comput. Surv. 53, 4 , Article 79 (aug 2020 ), 38 pages. https://doi.org/10.1145/3398665 10.1145/3398665 Jon Perez Cerrolaza et. al.2020. Multi-Core Devices for Safety-Critical Systems: A Survey. ACM Comput. Surv. 53, 4, Article 79 (aug 2020), 38 pages. https://doi.org/10.1145/3398665

4. T-CREST: Time-predictable multi-core architecture for embedded systems

5. A hard real-time capable multi-core SMT processor

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Timestamp Peripherals for Precise Real-Time Programming;Proceedings of the 21st ACM-IEEE International Conference on Formal Methods and Models for System Design;2023-09-21

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