Mitigating Prefetcher-Caused Pollution Using Informed Caching Policies for Prefetched Blocks

Author:

Seshadri Vivek1,Yedkar Samihan1,Xin Hongyi1,Mutlu Onur1,Gibbons Phillip B.2,Kozuch Michael A.2,Mowry Todd C.1

Affiliation:

1. Carnegie Mellon University, Pittsburgh PA

2. Intel Pittsburgh, Pittsburgh PA

Abstract

Many modern high-performance processors prefetch blocks into the on-chip cache. Prefetched blocks can potentially pollute the cache by evicting more useful blocks. In this work, we observe that both accurate and inaccurate prefetches lead to cache pollution, and propose a comprehensive mechanism to mitigate prefetcher-caused cache pollution. First, we observe that over 95% of useful prefetches in a wide variety of applications are not reused after the first demand hit (in secondary caches). Based on this observation, our first mechanism simply demotes a prefetched block to the lowest priority on a demand hit. Second, to address pollution caused by inaccurate prefetches, we propose a self-tuning prefetch accuracy predictor to predict if a prefetch is accurate or inaccurate. Only predicted-accurate prefetches are inserted into the cache with a high priority. Evaluations show that our final mechanism, which combines these two ideas, significantly improves performance compared to both the baseline LRU policy and two state-of-the-art approaches to mitigating prefetcher-caused cache pollution (up to 49%, and 6% on average for 157 two-core multiprogrammed workloads). The performance improvement is consistent across a wide variety of system configurations.

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Information Systems,Software

Cited by 35 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Two Level Neural Approach Combining Off-Chip Prediction with Adaptive Prefetch Filtering;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02

2. CLIP: Load Criticality based Data Prefetching for Bandwidth-constrained Many-core Systems;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28

3. ZPP: A Dynamic Technique to Eliminate Cache Pollution in NoC based MPSoCs;ACM Transactions on Embedded Computing Systems;2023-09-09

4. A Prefetch-Adaptive Intelligent Cache Replacement Policy Based on Machine Learning;Journal of Computer Science and Technology;2023-03-30

5. Criticality-aware priority to accelerate GPU memory access;The Journal of Supercomputing;2022-07-06

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