Author:
Gupta Puneet,Heng Fook-Luen
Cited by
8 articles.
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1. Classification Framework for Analysis and Modeling of Physically Induced Reliability Violations;ACM Computing Surveys;2015-04-16
2. Process Variation;Analysis and Design of Networks-on-Chip Under High Process Variation;2015
3. Variability-Aware Clock Design;Circuit Design for Reliability;2014-10-16
4. Classic DfM: From 2D to 3D;Design for Manufacturability;2013-08-11
5. Revisiting automated physical synthesis of high-performance clock networks;ACM Transactions on Design Automation of Electronic Systems;2013-03