On-Chip Memory Technology Design Space Explorations for Mobile Deep Neural Network Accelerators-Reference-Cited by-同舟云学术

On-Chip Memory Technology Design Space Explorations for Mobile Deep Neural Network Accelerators

Published:2019-06-02 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 56th Annual Design Automation Conference 2019
language:
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Author:

Li Haitong¹,Bhargava Mudit²,Whatmough Paul N.²,Wong H.-S. Philip¹

Affiliation:

1. Stanford University

2. Arm Research

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3316781.3317874

Reference25 articles.

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3. "NVIDIA Deep Learning Accelerator (NVDLA)." {Online}. Available: http://nvdla.org/primer.html "NVIDIA Deep Learning Accelerator (NVDLA)." {Online}. Available: http://nvdla.org/primer.html

4. Eyeriss: A Spatial Architecture for Energy-Efficient Dataflow for Convolutional Neural Networks

5. Memory leads the way to better computing

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