Author:
Singh Amit,Marek-Sadowska Malgorzata
Cited by
42 articles.
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1. VIPER: A VTR Interface for Placement with Error Resilience;14th International Symposium on Highly Efficient Accelerators and Reconfigurable Technologies (HEART'24));2024-06-19
2. Physical Implementation;FPGA EDA;2024
3. VTR 8;ACM Transactions on Reconfigurable Technology and Systems;2020-06-30
4. Multi‐objective optimisation algorithm for routability and timing driven circuit clustering on FPGAs;IET Computers & Digital Techniques;2019-02-19
5. LSC;Proceedings of the 54th Annual Design Automation Conference 2017;2017-06-18