Bridging the Gap between Design and Verification of Embedded Systems in Model Based System Engineering-Reference-Cited by-同舟云学术

Bridging the Gap between Design and Verification of Embedded Systems in Model Based System Engineering

Published:2020-06-22 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 12th International Conference on Computer Modeling and Simulation
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Author:

Anwar Muhammad Waseem¹,Qamar Shumaila¹,Azam Farooque¹,Butt Wasi Haider¹,Rashid Muhammad²

Affiliation:

1. Department of Computer & Software Engineering, College of E&ME, National University of Sciences and Technology (NUST), Islamabad, Pakistan

2. Computer Engineering Department, Umm Al-Qura University, Saudi Arabia

Publisher

ACM

Reference20 articles.

1. Muhammad Waseem Anwar M Rashid F. Azam M. Kashif and WH Butt: A model-driven framework for design and verification of embedded systems through SystemVerilog Journal of Design Automation for embedded systems 2019 Vol 23 Issue 3-4 Pages 179--223. Muhammad Waseem Anwar M Rashid F. Azam M. Kashif and WH Butt: A model-driven framework for design and verification of embedded systems through SystemVerilog Journal of Design Automation for embedded systems 2019 Vol 23 Issue 3-4 Pages 179--223.

2. Muhammad Rashid Muhammad Waseem Anwar and Muhammad Amir "Towards the Tools Selection in Model Based System Engineering for Embedded Systems - A Systematic Literature Review" Journal of Systems and Software (JSS) 2015 Volume 106 Pages 150--163. Muhammad Rashid Muhammad Waseem Anwar and Muhammad Amir "Towards the Tools Selection in Model Based System Engineering for Embedded Systems - A Systematic Literature Review" Journal of Systems and Software (JSS) 2015 Volume 106 Pages 150--163.

3. Open Verification Methodology (OVM) Last Accessed Nov. 2019 https://verificationacademy.com/topics/verificationmethodology/ovm Open Verification Methodology (OVM) Last Accessed Nov. 2019 https://verificationacademy.com/topics/verificationmethodology/ovm

4. IEEE Universal Verification Methodology (UVM) Last Accessed Nov. 2019 https://standards.ieee.org/standard/1800_2-2017.html IEEE Universal Verification Methodology (UVM) Last Accessed Nov. 2019 https://standards.ieee.org/standard/1800_2-2017.html

5. Caba J. etal "Testing framework for on-board verification of HLS modules using grey-box technique and FPGA overlays" Journal of Integration 2019 Vol. 68 pp 129--138. Caba J. et al. "Testing framework for on-board verification of HLS modules using grey-box technique and FPGA overlays" Journal of Integration 2019 Vol. 68 pp 129--138.