Author:
Jain Rajiv,Mujumdar Ashutosh,Sharma Alok,Wang Hueymin
Cited by
14 articles.
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1. Using Multiple Clocks in Highlevel Synthesis to overcome unbalanced clock cycles;2023 IEEE 16th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2023-12-18
2. Optimization on operation sorting for HLS scheduling algorithms;Integration;2023-11
3. SAT-based Scheduling Algorithm for High-level Synthesis Considering Resource Sharing;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28
4. Entropy-Directed Scheduling for FPGA High-Level Synthesis;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2020-10
5. Optimization of Dynamic Power for System on Programmable Chip SOPC;Handbook of Research on Power and Energy System Optimization;2018