Modeling processor idle times in MPSoC platforms to enable integrated DPM, DVFS, and task scheduling subject to a hard deadline

Author:

Esmaili Amirhossein1,Nazemi Mahdi1,Pedram Massoud1

Affiliation:

1. University of Southern California

Publisher

ACM

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. DELICIOUS: Deadline-Aware Approximate Computing in Cache-Conscious Multicore;IEEE Transactions on Parallel and Distributed Systems;2023-02-01

2. RT-SEAT: A hybrid approach based real-time scheduler for energy and temperature efficient heterogeneous multicore platforms;Results in Engineering;2022-12

3. Approximation-aware Task Deployment on Heterogeneous Multi-core Platforms with DVFS;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2022

4. Prepare: P owe r -Awar e A p proximate Re a l-time Task Scheduling for Ene r gy-Adaptiv e QoS Maximization;ACM Transactions on Embedded Computing Systems;2021-10-31

5. Dynamic idle core management and leakage current reuse in MPSoC platforms;Proceedings of the ACM/IEEE International Symposium on Low Power Electronics and Design;2020-08-10

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