NVM duet

Author:

Liu Ren-Shuo1,Shen De-Yu1,Yang Chia-Lin1,Yu Shun-Chih1,Wang Cheng-Yuan Michael2

Affiliation:

1. National Taiwan University, Taipei, Taiwan Roc

2. Macronix International Co., Ltd., Hsinchu, Taiwan Roc

Abstract

Emerging non-volatile memory (NVM) technologies have gained a lot of attention recently. The byte-addressability and high density of NVM enable computer architects to build large-scale main memory systems. NVM has also been shown to be a promising alternative to conventional persistent store. With NVM, programmers can persistently retain in-memory data structures without writing them to disk. Therefore, one can envision that in the future, NVM will play the role of both working memory and persistent store at the same time. Persistent store demands consistency and durability guarantees, thereby imposing new design constraints on the memory system. Consistency is achieved at the expense of serializing multiple write operations. Durability requires memory cells to guarantee non-volatility and thus reduces the write speed. Therefore, a unified architecture oblivious to these two use cases would lead to suboptimal design. In this paper, we propose a novel unified working memory and persistent store architecture, NVM Duet, which provides the required consistency and durability guarantees for persistent store while relaxing these constraints if accesses to NVM are for working memory. A cross-layer design approach is adopted to achieve the design goal. Overall, simulation results demonstrate that NVM Duet achieves up to 1.68x (1.32x on average) speedup compared with the baseline design.

Publisher

Association for Computing Machinery (ACM)

Subject

Computer Graphics and Computer-Aided Design,Software

Reference73 articles.

1. SNIA non volatile memory (NVM) programming technical work group (TWG). http://snia.org/forums/sssi/nvmp. SNIA non volatile memory (NVM) programming technical work group (TWG). http://snia.org/forums/sssi/nvmp.

2. JESD218A: Solid-state drive (SSD) requirements and endurance test method Feb. 2011. JESD218A: Solid-state drive (SSD) requirements and endurance test method Feb. 2011.

3. Process integration devices and structures (PIDS). Technical report ITRS 2012. Process integration devices and structures (PIDS). Technical report ITRS 2012.

4. Efficient scrub mechanisms for error-prone emerging memories

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