Self-Adaptive Filtering Algorithm with PCM-Based Memory Storage System

Abstract

This article proposes a new phase change memory– (PCM) based memory storage architecture with associated self-adaptive data filtering for various embedded devices to support energy efficiency as well as high computing power. In this approach, PCM-based memory storage can be used as working memory and mass storage layers simultaneously, and a self-adaptive data filtering module composed of small DRAM dual buffers was designed to improve unfavorable PCM features, such as asymmetric read/write access latencies and limited endurance and enhance spatial/temporal localities. In particular, the self-adaptive data filtering algorithm enhances data reusability by screening potentially high reusable data and predicting adequate lifetime of those data depending on current victim time decision value. We also propose the possibility that a small amount of DRAM buffer is embedded into mobile processors, keeping this as small as possible for cost effectiveness and energy efficiency. Experimental results show that by exploiting a small amount of DRAM space for dual buffers and using the self-adaptive filtering algorithm to manage them, the proposed system can reduce execution time by a factor of 1.9 compared to the unified conventional model with same the DRAM capacity and can be considered comparable to 1.5× DRAM capacity.