Loading Effect Free MOS-only Voltage Reference Ladder for ADC in RRAM-crossbar Array
Author:
Affiliation:
1. Indian Institute of Technology Indore, Indore, MP, India
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3526241.3530354
Reference12 articles.
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3. A 23pW, 780ppm/°C resistor-less current reference using subthreshold MOSFETs
4. CASCADE
5. A 0.67- $\mu\text{W}$ 177-ppm/°C All-MOS Current Reference Circuit in a 0.18- $\mu\text{m}$ CMOS Technology
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