Graph Neural Network based Netlist Operator Detection under Circuit Rewriting

Author:

Zhao Guangwei1,Shamsi Kaveh1

Affiliation:

1. University of Texas at Dallas, Richardson, TX, USA

Publisher

ACM

Reference10 articles.

1. [n.d.]. Yosys verilog synthesis framework. https://github.com/YosysHQ/yosys. [n.d.]. Yosys verilog synthesis framework. https://github.com/YosysHQ/yosys.

2. Lilas Alrahis , Abhrajit Sengupta , Johann Knechtel , Satwik Patnaik , Hani Saleh , Baker Mohammad , Mahmoud Al-Qutayri , and Ozgur Sinanoglu . 2021. GNN-RE: Graph Neural Networks for Reverse Engineering of Gate-Level Netlists . IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ( 2021 ). Lilas Alrahis, Abhrajit Sengupta, Johann Knechtel, Satwik Patnaik, Hani Saleh, Baker Mohammad, Mahmoud Al-Qutayri, and Ozgur Sinanoglu. 2021. GNN-RE: Graph Neural Networks for Reverse Engineering of Gate-Level Netlists. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2021).

3. Estimate of signal probability in combinational logic networks

4. Graph Neural Networks in TensorFlow and Keras with Spektral [Application Notes]

5. Cryptographic Obfuscation

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