DynaSprint-Reference-Cited by-同舟云学术

DynaSprint

Published:2019-10-12 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 52nd Annual IEEE/ACM International Symposium on Microarchitecture
language:
Short-container-title:

Author:

Huang Ziqiang¹,Joao José A.²,Rico Alejandro²,Hilton Andrew D.³,Lee Benjamin C.³

Affiliation:

1. University of Waterloo

2. Arm Research

3. Duke University

Funder

National Science Foundation

Semiconductor Research Corporation

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3352460.3358301

Reference55 articles.

1. [n. d.]. Intel 64 and IA-32 Architectures software developer's manual. [n. d.]. Intel 64 and IA-32 Architectures software developer's manual.

2. [n. d.]. Intel Running Average Power Limit. url:https://01.org/blogs/2014/running-average-power-limit-rapl. [n. d.]. Intel Running Average Power Limit. url:https://01.org/blogs/2014/running-average-power-limit-rapl.

3. [n. d.]. Intel VTune Amplifier 2018 User's Guide. url:https://software.intel.com/en-us/vtune-amplifier-help-hardware-event-skid. [n. d.]. Intel VTune Amplifier 2018 User's Guide. url:https://software.intel.com/en-us/vtune-amplifier-help-hardware-event-skid.

4. Dynamically tuning processor resources with adaptive processing

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