Distributed Logless Atomic Durability with Persistent Memory

Author:

Gupta Siddharth1,Daglis Alexandros2,Falsafi Babak1

Affiliation:

1. EcoCloud, EPFL

2. Georgia Institute of Technology

Funder

Huawei Technologies

Publisher

ACM

Reference46 articles.

1. 2018. Intel Mesh Interconnect Architecture. https://en.wikichip.org/wiki/intel/mesh_interconnect_architecture. 2018. Intel Mesh Interconnect Architecture. https://en.wikichip.org/wiki/intel/mesh_interconnect_architecture.

2. 2019. AMD Zen Microarchitectures. https://en.wikichip.org/wiki/amd/microarchitectures/zen#Multiprocessors. 2019. AMD Zen Microarchitectures. https://en.wikichip.org/wiki/amd/microarchitectures/zen#Multiprocessors.

3. Rajeev Balasubramonian Norman P. Jouppi and Naveen Muralimanohar. 2011. Multi-Core Cache Hierarchies. Morgan & Claypool Publishers. Rajeev Balasubramonian Norman P. Jouppi and Naveen Muralimanohar. 2011. Multi-Core Cache Hierarchies. Morgan & Claypool Publishers.

4. BulkSC

5. Atlas

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2. Compiler-Directed Whole-System Persistence;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

3. Persistent Processor Architecture;56th Annual IEEE/ACM International Symposium on Microarchitecture;2023-10-28

4. ENTS: Flush-and-Fence-Free Failure Atomic Transactions;Proceedings of the International Symposium on Memory Systems;2023-10-02

5. Āpta: Fault-tolerant object-granular CXL disaggregated memory for accelerating FaaS;2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN);2023-06

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