Net-length-based routability-driven power-aware clustering

Author:

Easwaran Lakshmi1,Akoglu Ali1

Affiliation:

1. University of Arizona, Tucson, AZ

Abstract

The state-of-the-art power-aware clustering tool, P-T-VPack, achieves energy reduction by localizing nets with high switching activity at the expense of channel width and area. In this study, we employ predicted individual postplacement net length information during clustering and prioritize longer nets. This approach targets the capacitance factor for energy reduction, and prioritizes longer nets for channel width and area reduction. We first introduce a new clustering strategy, W-T-VPack, which replaces the switching activity in P-T-VPack with a net length factor. We obtain a 9.87% energy reduction over T-VPack (3.78% increase over P-T-VPack), while at the same time completely eliminating P-T-VPack's channel width and area overhead. We then introduce W-P-T-VPack, which combines switching activity and net length factors. W-P-T-VPack achieves 14.26% energy reduction (0.31% increase over P-T-VPack), while further improving channel width by up to 12.87% for different cluster sizes. We investigate the energy performance of routability (channel width)-driven clustering algorithms, and show that W-T-VPack consistently outperforms T-RPack and iRAC by at least 11.23% and 9.07%, respectively. We conclude that net-length-based clustering is an effective method to concurrently target energy and channel width.

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science

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1. How Preserving Circuit Design Hierarchy During FPGA Packing Leads to Better Performance;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2018-03

2. An Architecture Independent Packing Method for LUT-based Commercial FPGA;Journal of Computers;2014-05-01

3. Integration of Net-Length Factor with Timing- and Routability-Driven Clustering Algorithms;ACM Transactions on Reconfigurable Technology and Systems;2013-10

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