Affiliation:
1. Computer Sciences Department, University of Wisconsin, Madison, Wisconsin
Abstract
In this paper, we present a Lisp machine architecture that supports efficient list manipulation. This Lisp architecture is organized as two processing units: a List Processor (LP), that performs all list related operations and manages the list memory, and an Evaluation Processor (EP), that maintains the addressing and control environment. The LP contains a translation table (LPT) that maps a small set of list identifiers into the physical memory addresses of objects. Essentially, the LP and LPT virtualize a list. The EP then operates on these virtualized lists. Such an organization permits the overlap of EP function evaluation with LP memory accesses and management, thus reducing the performance penalties typically associated with Lisp list manipulation activities. We used trace-driven simulations to evaluate this architecture. From our evaluation a relatively small LPT is seen to be sufficient, and to yield “hit rates” on data accesses higher than those of a data cache of comparable size.
Publisher
Association for Computing Machinery (ACM)
Reference19 articles.
1. List processing in real time on a serial computer
2. Bawden A. et al. "Lisp Machine Progress Report " MIT AI Laboratory Memo No. 444 (August 1977). Bawden A. et al. "Lisp Machine Progress Report " MIT AI Laboratory Memo No. 444 (August 1977).
3. Compact Encodings of List Structure
4. Managing Reentrant Structures Using Reference Counts
5. An empirical study of list structure in Lisp