Load Balanced On-Chip Power Delivery for Average Current Demand
Author:
Affiliation:
1. Drexel University, Philadelphia, PA, USA
2. George Mason University, Fairfax, VA, USA
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/2902961.2903030
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1. The 12-Core POWER8™ Processor With 7.6 Tb/s IO Bandwidth, Integrated Voltage Regulation, and Resonant Clocking
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3. McPAT
Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Co-manage power delivery and consumption for manycore systems using reinforcement learning;Proceedings of the International Conference on Computer-Aided Design;2018-11-05
2. Smart Grid on Chip: Work Load-Balanced On-Chip Power Delivery;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-09
3. Work Load Scheduling For Multi Core Systems With Under-Provisioned Power Delivery;Proceedings of the on Great Lakes Symposium on VLSI 2017;2017-05-10
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