Enhancing Hardware Security with Emerging Transistor Technologies-Reference-Cited by-同舟云学术

Enhancing Hardware Security with Emerging Transistor Technologies

Published:2016-05-18 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 26th edition on Great Lakes Symposium on VLSI
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Author:

Bi Yu¹,Hu X. Sharon²,Jin Yier²,Niemier Michael²,Shamsi Kaveh¹,Yin Xunzhao²

Affiliation:

1. University of Central Florida, Orlando, FL, USA

2. University of Notre Dame, Notre Dame, IN, USA

Funder

SRC/DARPA STARnet

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/2902961.2903041

Reference35 articles.

1. Evaluation of Dynamic Voltage and Frequency Scaling as a Differential Power Analysis Countermeasure

2. A generic standard cell design methodology for differential circuit styles

3. Leveraging Emerging Technology for Hardware Security - Case Study on Silicon Nanowire FETs and Graphene SymFETs

4. Y. Bi K. Shamsi J.-S. Yuan P.-E. Gaillardon G. De Micheli X. Yin X. Hu M. Niemier and Y. Jin. Emerging technology based design of primitives for hardware security. ACM Journal on Emerging Technologies in Computing Systems (JETC). (to appear). 10.1145/2816818 Y. Bi K. Shamsi J.-S. Yuan P.-E. Gaillardon G. De Micheli X. Yin X. Hu M. Niemier and Y. Jin. Emerging technology based design of primitives for hardware security. ACM Journal on Emerging Technologies in Computing Systems (JETC). (to appear). 10.1145/2816818

5. Tunnel fet current mode logic for dpa-resilient circuit designs;Bi Y.;IEEE Transactions on Smart Grid, page under review,2016

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