Automatic Construction of Program-Optimized FPGA Memory Networks-Reference-Cited by-同舟云学术

Automatic Construction of Program-Optimized FPGA Memory Networks

Published:2017-02-22 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 2017 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays
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Author:

Yang Hsin-Jung¹,Fleming Kermin²,Winterstein Felix³,Chen Annie I.¹,Adler Michael²,Emer Joel⁴

Affiliation:

1. Massachusetts Institute of Technology, Cambridge, MA, USA

2. Intel Corporation, Hudson, MA, USA

3. Imperial College London, London, United Kingdom

4. Massachusetts Institute of Technology & NVIDIA, Cambridge, MA, USA

Publisher

ACM

Link

https://dl.acm.org/doi/pdf/10.1145/3020078.3021748

Reference29 articles.

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5. VirtualRC

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4. Towards Application-Centric Parallel Memories;Lecture Notes in Computer Science;2018-12-31

5. MAX-PolyMem: High-Bandwidth Polymorphic Parallel Memories for DFEs;2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW);2018-05