Fairness enforcement in switch on event multithreading

Author:

Gabor Ron1,Weiss Shlomo2,Mendelson Avi3

Affiliation:

1. Tel Aviv University; Intel Corporation, Tel Aviv

2. Tel Aviv University, Tel Aviv

3. Intel Corporation

Abstract

The need to reduce power and complexity will increase the interest in Switch On Event multithreading (coarse-grained multithreading). Switch On Event multithreading is a low-power and low-complexity mechanism to improve processor throughput by switching threads on execution stalls. Fairness may, however, become a problem in a multithreaded processor. Unless fairness is properly handled, some threads may starve while others consume all of the processor cycles. Heuristics that were devised in order to improve fairness in simultaneous multithreading are not applicable to Switch On Event multithreading. This paper defines the fairness metric using the ratio of the individual threads' speedups and shows how it can be enforced in Switch On Event multithreading. Fairness is controlled by forcing additional thread switch points. These switch points are determined dynamically by runtime estimation of the single threaded performance of each of the individual threads. We analyze the impact of the fairness enforcement mechanism on aggregate IPC and weighted speedup. We present simulation results of the performance of Switch On Event multithreading. Switch On Event multithreading achieves an average aggregate IPC increase of 26% over single thread and 12% weighted speedup when no fairness is enforced. In this case, a sixth of our runs resulted in poor fairness in which one thread ran extremely slowly (10 to 100 times slower than its single-thread performance), while the other thread's performance was hardly affected. By using the proposed mechanism, we can guarantee fairness at different levels of strictness and, in most cases, even improve the weighted speedup.

Publisher

Association for Computing Machinery (ACM)

Subject

Hardware and Architecture,Information Systems,Software

Cited by 24 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. The what , The from , and The to : The Migration Games in Deduplicated Systems;ACM Transactions on Storage;2022-11-15

2. Which Metric Is Suitable for Evaluating Your Multi-Threading Processors? In Terms of Throughput, Fairness, and Predictability;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2020-09-01

3. A Hardware Approach to Fairly Balance the Inter-Thread Interference in Shared Caches;IEEE Transactions on Parallel and Distributed Systems;2017-11-01

4. Application Clustering Policies to Address System Fairness with Intel’s Cache Allocation Technology;2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT);2017-09

5. A Dynamic Resource Controller for a Lambda Architecture;2017 46th International Conference on Parallel Processing (ICPP);2017-08

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