Affiliation:
1. Department of Computer Science, Peking University, China and Peng Cheng Laboratory, Shenzhen, Guangdong, China
2. Department of Computer Science, Michigan Technological University, Houghton, MI, USA
Abstract
Due to large data volume and low latency requirements of modern web services, the use of an in-memory key-value (KV) cache often becomes an inevitable choice (e.g., Redis and Memcached). The in-memory cache holds hot data, reduces request latency, and alleviates the load on background databases. Inheriting from the traditional hardware cache design, many existing KV cache systems still use recency-based cache replacement algorithms, e.g., least recently used or its approximations. However, the diversity of miss penalty distinguishes a KV cache from a hardware cache. Inadequate consideration of penalty can substantially compromise space utilization and request service time. KV accesses also demonstrate locality, which needs to be coordinated with miss penalty to guide cache management.
In this article, we first discuss how to enhance the existing cache model, the Average Eviction Time model, so that it can adapt to modeling a KV cache. After that, we apply the model to Redis and propose pRedis,
Penalty- and Locality-aware Memory Allocation
in Redis, which synthesizes data locality and miss penalty, in a quantitative manner, to guide memory allocation and replacement in Redis. At the same time, we also explore the diurnal behavior of a KV store and exploit long-term reuse. We replace the original passive eviction mechanism with an automatic dump/load mechanism, to smooth the transition between access peaks and valleys. Our evaluation shows that pRedis effectively reduces the average and tail access latency with minimal time and space overhead. For both real-world and synthetic workloads, our approach delivers an average of 14.0%∼52.3% latency reduction over a state-of-the-art penalty-aware cache management scheme, Hyperbolic Caching (HC), and shows more quantitative predictability of performance. Moreover, we can obtain even lower average latency (1.1%∼5.5%) when dynamically switching policies between pRedis and HC.
Funder
National Key R&D Program of China
National Science Foundation of China
National Science Foundation
Publisher
Association for Computing Machinery (ACM)
Subject
Hardware and Architecture
Cited by
5 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Multi-Tenant In-Memory Key-Value Cache Partitioning Using Efficient Random Sampling-Based LRU Model;IEEE Transactions on Cloud Computing;2023-10
2. CASHT: Contention Analysis in Shared Hierarchies with Thefts;ACM Transactions on Architecture and Code Optimization;2022-01-23
3. A Comparative Analysis of Security Features and Concerns in NoSQL Databases;Communications in Computer and Information Science;2022
4. Survey of Performance Comparison Based on Non Relational Database;2021 IEEE 23rd Int Conf on High Performance Computing & Communications; 7th Int Conf on Data Science & Systems; 19th Int Conf on Smart City; 7th Int Conf on Dependability in Sensor, Cloud & Big Data Systems & Application (HPCC/DSS/SmartCity/DependSys);2021-12
5. NCA: Accelerating Network Caching with eXpress Data Path;2021 4th International Conference on Hot Information-Centric Networking (HotICN);2021-11-25