Model checking and modular verification

Author:

Grumberg Orna1,Long David E.2

Affiliation:

1. Technion–Israel Institute of Technology, Haifa, Israel

2. Carnegie Mellon Univ., Pittsburgh, PA

Abstract

We describe a framework for compositional verification of finite-state processes. The framework is based on two ideas: a subset of the logic CTL for which satisfaction is preserved under composition, and a preorder on structures which captures the relation between a component and a system containing the component. Satisfaction of a formula in the logic corresponds to being below a particular structure (a tableau for the formula) in the preorder. We show how to do assume-guarantee-style reasoning within this framework. Additionally, we demonstrate efficient methods for model checking in the logic and for checking the preorder in several special cases. We have implemented a system based on these methods, and we use it to give a compositional verification of a CPU controller.

Publisher

Association for Computing Machinery (ACM)

Subject

Software

Reference30 articles.

1. The temporal logic of branching time;BEN-ARI M.;Acta Informatica,1983

2. Lecture Notes in Computer Science;CLARKE E. M.

3. Automatic verification of finite-state concurrent systems using temporal logic specifications

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