Automatic verification of finite-state concurrent systems using temporal logic specifications

Author:

Clarke E. M.1,Emerson E. A.2,Sistla A. P.3

Affiliation:

1. Carnegie Mellon Univ.

2. Univ. of Texas, Austin

3. GTE Laboratories, Inc.

Abstract

We give an efficient procedure for verifying that a finite-state concurrent system meets a specification expressed in a (propositional, branching-time) temporal logic. Our algorithm has complexity linear in both the size of the specification and the size of the global state graph for the concurrent system. We also show how this approach can be adapted to handle fairness. We argue that our technique can provide a practical alternative to manual proof construction or use of a mechanical theorem prover for verifying many finite-state concurrent systems. Experimental results show that state machines with several hundred states can be checked in a matter of seconds.

Publisher

Association for Computing Machinery (ACM)

Subject

Software

Reference19 articles.

1. A note on reliable full-duplex transmission over half-duplex links

2. Lecture Notes in Computer Science, 131;CLARKE E. M.,1981

3. Lecture Notes in Computer Science, 85;EMERSON E. A.,1981

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