Author:
Lin David,Hong Ted,Fallah Farzan,Hakim Nagib,Mitra Subhasish
Cited by
6 articles.
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1. Model Checking Leveraged Error Localization for Complex RTL Designs;2022 IEEE 40th International Conference on Computer Design (ICCD);2022-10
2. Observability-Aware Post-Silicon Test Generation;Post-Silicon Validation and Debug;2018-09-02
3. Post-Silicon SoC Validation Challenges;Post-Silicon Validation and Debug;2018-09-02
4. Deconfigurable microprocessor architectures for silicon debug acceleration;ACM SIGARCH Computer Architecture News;2013-06-26
5. Deconfigurable microprocessor architectures for silicon debug acceleration;Proceedings of the 40th Annual International Symposium on Computer Architecture;2013-06-23