ReShape

Author:

Neely Christopher E.1,Brebner Gordon2,Shang Weijia3

Affiliation:

1. Xilinx, Inc. and Santa Clara University

2. Xilinx, Inc.

3. Santa Clara University

Abstract

The latest FPGA devices provide the headroom to implement large-scale and complex systems. A key requirement is the integration of modules from diverse sources to promote modular design and reuse. A contrary factor is that using dynamic partial reconfiguration typically requires low-level planning of the system implementation. In this article, we introduce ReShape: a high-level approach for designing reconfigurable systems by interconnecting modules, which gives a “plug and play” look and feel, is supported by tools that carry out implementation functions, and is carried through to support system reconfiguration during operation. The emphasis is on the inter-module connections and abstracting the communication patterns that are typical between modules: for example, the streaming of data, or the reading and writing of data to and from memory modules. The details of wiring and signaling are hidden from view, via metadata associated with individual modules. This setting allows system reconfiguration at the module level, both by supporting type checking of replacement modules and by managing the overall system implementation, via metadata associated with its FPGA floorplan. The methodology and tools have been implemented in a prototype targeted to a domain-specific setting---high-speed networking---and have been validated on real telecommunications design projects.

Publisher

Association for Computing Machinery (ACM)

Subject

General Computer Science

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. AMAH-Flex: A Modular and Highly Flexible Tool for Generating Relocatable Systems on FPGAs;2021 International Conference on Field-Programmable Technology (ICFPT);2021-12-06

2. A modeling front-end for seamless design and generation of context-aware Dynamically Reconfigurable Systems-on-Chip;Journal of Parallel and Distributed Computing;2018-02

3. Floorplanning Automation for Partial-Reconfigurable FPGAs via Feasible Placements Generation;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-01

4. PRFloor;Proceedings of the 2016 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays;2016-02-21

5. Reconfigurable Computing Architectures;Proceedings of the IEEE;2015-03

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