Network-on-Chip Intellectual Property Protection Using Circular Path--based Fingerprinting

Author:

Biswas Arnab Kumar1ORCID

Affiliation:

1. Electrical and Computer Engineering department, National University of Singapore, Singapore

Abstract

Intellectual property (IP) reuse is a well-known technique in chip design industry. But this technique also exposes a security vulnerability called IP stealing attack. Network-on-Chip (NoC) is an on-chip scalable communication medium and is used as an IP and sold by various vendors to be integrated in a Multiprocessor System-on-Chip (MPSoC). An attacker can launch IP stealing attack against NoC IP. In this article, we propose a NoC IP protection technique called circular path--based fingerprinting (CPF) using fingerprint embedding. We also provide a theoretical model using polyomino theory to get the number of distinct fingerprints in a NoC. We show that our proposed technique requires much less hardware overhead compared to an existing NoC IP security solution and also provides better security against removal and masking attacks. In particular, our proposed CPF technique requires 27.41% less router area compared to the existing solution. We also show that our CPF solution does not affect the normal packet latency and hence does not degrade the NoC performance.

Publisher

Association for Computing Machinery (ACM)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Digital Watermarking for Detecting Malicious Intellectual Property Cores in NoC Architectures;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2022-07

2. Protecting Network-on-Chip Intellectual Property Using Timing Channel Fingerprinting;ACM Transactions on Embedded Computing Systems;2022-02-08

3. Securing on-Chip Communication Using Digital Watermarking;Network-on-Chip Security and Privacy;2021

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