Affiliation:
1. University of Wisconsin-Madison, Madison, WI
2. Broadcom, CA
3. Qualcomm Research Silicon Valley, Santa Clara, CA
Abstract
Spatial architectures provide energy-efficient computation but require effective scheduling algorithms. Existing heuristic-based approaches offer low compiler/architect productivity, little optimality insight, and low architectural portability.
We seek to develop a spatial-scheduling framework by utilizing constraint-solving theories and find that architecture primitives and scheduler responsibilities can be related through five abstractions: computation placement, data routing, event timing, resource utilization, and the optimization objective. We encode these responsibilities as 20 mathematical constraints, using SMT and ILP, and create schedulers for the TRIPS, DySER, and PLUG architectures. Our results show that a general declarative approach using constraint solving is implementable, is practical, and can outperform specialized schedulers.
Funder
Division of Computing and Communication Foundations
Division of Computer and Network Systems
Publisher
Association for Computing Machinery (ACM)
Reference56 articles.
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