A vector and array multiprocessor extension of the sylvan architecture

Author:

Burkowski F. J.1

Affiliation:

1. Department of Computer Science, University of Waterloo, Waterloo, Canada

Abstract

The main intent of this paper will be the description of a multiprocessor system that uses microprogrammed hardware to support operating system primitives that contribute to its high performance vector processing capability. The system consists of nodes that communicate over a system interconnect. Each node is a tripartite subsystem that consists of a host processor complex running application code, a vector co-processor and a kernel support processor that handles both operating system functions and control of the vector co-processor. The microcoded kernel processor is used to support a message based operating system that allows concurrent processes to communicate while residing in the same node or in different nodes. Since the kernel processor controls the functioning of the vector co-processor as well as the management of processes (for example, context switching), the node can utilize the resources of the co-processor very effectively.

Publisher

Association for Computing Machinery (ACM)

Reference12 articles.

1. Gajski D. Kuck D. Lawrie D. and Sameh A. "Construction of a Large Scale Multiprocessor " Report No. UIUCDCS-R-83-1123 Feb. 1983 Dept. of Computer Science Univ. of Illinois at Urbana Illinois. Gajski D. Kuck D. Lawrie D. and Sameh A. "Construction of a Large Scale Multiprocessor " Report No. UIUCDCS-R-83-1123 Feb. 1983 Dept. of Computer Science Univ. of Illinois at Urbana Illinois.

2. Data Flow Supercomputers

3. Hypertree: A Multiprocessor Interconnection Topology

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1. SPIRE;ACM SIGARCH Computer Architecture News;1992-03

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