Take the Highway

Author:

Abdelfattah Mohamed S.1,Bitar Andrew1,Betz Vaughn1

Affiliation:

1. University of Toronto, Toronto, ON, Canada

Funder

Vanier CGS

Altera

NSERC

Publisher

ACM

Reference27 articles.

1. M. S. Abdelfattah. FPGA NoC Designer. www.eecg.utoronto.ca/~mohamed/noc_designer.html. M. S. Abdelfattah. FPGA NoC Designer. www.eecg.utoronto.ca/~mohamed/noc_designer.html.

2. Design tradeoffs for hard and soft FPGA-based Networks-on-Chip

3. The power of communication: Energy-efficient NOCS for FPGAS

4. Networks-on-Chip for FPGAs

5. The Case for Embedded Networks on Chip on Field-Programmable Gate Arrays

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1. Sixer: A low-overhead, fully-distributed test scheme with guaranteed delivery of packets in networks-on-chip;Microelectronics Reliability;2023-03

2. Field-Programmable Gate Array Architecture;Handbook of Computer Architecture;2023

3. RAD-Sim: Rapid Architecture Exploration for Novel Reconfigurable Acceleration Devices;2022 32nd International Conference on Field-Programmable Logic and Applications (FPL);2022-08

4. Hipernetch: High-Performance FPGA Network Switch;ACM Transactions on Reconfigurable Technology and Systems;2022-03-31

5. Architecture and Application Co-Design for Beyond-FPGA Reconfigurable Acceleration Devices;IEEE Access;2022

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