Pipeline circuits to compute several expressions

Author:

Steinberg B. Y.1,Bagliy A. P.1,Petrova Zh. M.1,Steinberg O. B.1

Affiliation:

1. Sothern federal university, Rostov-on-Don

Funder

Russian Foundation for Basic Research

Publisher

ACM Press

Reference20 articles.

1. 2018. Optimiziruyushchaya rasparallelivayushchaya sistema. Retrieved September 1, 2018 from http://ops.rsu.ru/about_OPS.shtml

2. ZHumana M Abu-Halil, Sergej A Guda, and SHtejnberg Boris YA. 2015. Perenos parallel'nyh programm bez poteri ehffektivnosti. Otkrytye sistemy. SUBD. 4 (2015), 18--19.

3. ZHumana M Abu-Halil, Roman I Morylev, and Boris YA SHtejnberg. 2013. Parallel'nyj algoritm global'nogo vyravnivaniya s optimal'nym ispol'zovaniem pamyati. Sovremennye problemy nauki i obrazovaniya 1 (2013), 112--112.

4. Anton P Baglij, Denis V Dubrov, Boris YA SHtejnberg, and Roman B SHtejnberg. 2017. Povtornoe ispol'zovanie resursov pri konvejernyh vychisleniyah. In Nauchnyj servis v seti Internet. 43--47.

5. Kiran Bondalapati and Viktor K Prasanna. 2000. Loop pipelining and optimization for run time reconfiguration. In International Parallel and Distributed Processing Symposium. Springer, 906--915.

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Program transformations as the base for optimizing parallelizing compilers;Program Systems: Theory and Applications;2020-03-02

2. On the Development of the Compiler from C to the Processor with FPGA Accelerator;Frontiers in Software Engineering Education;2020

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