Pipeline circuits to compute several expressions-Reference-Cited by-同舟云学术

Pipeline circuits to compute several expressions

Published:2018 Issue: Volume: Page:
ISSN:
Container-title:Proceedings of the 14th Central and Eastern European Software Engineering Conference Russia on ZZZ - CEE-SECR '18
language:
Short-container-title:

Author:

Steinberg B. Y.¹,Bagliy A. P.¹,Petrova Zh. M.¹,Steinberg O. B.¹

Affiliation:

1. Sothern federal university, Rostov-on-Don

Funder

Russian Foundation for Basic Research

Publisher

ACM Press

Reference20 articles.

1. 2018. Optimiziruyushchaya rasparallelivayushchaya sistema. Retrieved September 1, 2018 from http://ops.rsu.ru/about_OPS.shtml

2. ZHumana M Abu-Halil, Sergej A Guda, and SHtejnberg Boris YA. 2015. Perenos parallel'nyh programm bez poteri ehffektivnosti. Otkrytye sistemy. SUBD. 4 (2015), 18--19.

3. ZHumana M Abu-Halil, Roman I Morylev, and Boris YA SHtejnberg. 2013. Parallel'nyj algoritm global'nogo vyravnivaniya s optimal'nym ispol'zovaniem pamyati. Sovremennye problemy nauki i obrazovaniya 1 (2013), 112--112.

4. Anton P Baglij, Denis V Dubrov, Boris YA SHtejnberg, and Roman B SHtejnberg. 2017. Povtornoe ispol'zovanie resursov pri konvejernyh vychisleniyah. In Nauchnyj servis v seti Internet. 43--47.

5. Kiran Bondalapati and Viktor K Prasanna. 2000. Loop pipelining and optimization for run time reconfiguration. In International Parallel and Distributed Processing Symposium. Springer, 906--915.

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