Hardware Divider
Author:
Affiliation:
1. Computer Science and Engineering Department, Technical University of Varna, Varna, Bulgaria
Publisher
ACM
Link
https://dl.acm.org/doi/pdf/10.1145/3274005.3274009
Reference7 articles.
1. F. Agner (2017) Lists of instruction latencies throughputs and micro-operation breakdowns for Intel AMD and VIA CPUs Technical University of Denmark Copyright © 1996-2017. Last updated 2017-05-02 F. Agner (2017) Lists of instruction latencies throughputs and micro-operation breakdowns for Intel AMD and VIA CPUs Technical University of Denmark Copyright © 1996-2017. Last updated 2017-05-02
2. Efficient Algorithms for Integer Division by Constants Using Multiplication
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1. A Low-Latency Divider Design for Embedded Processors;Sensors;2022-03-23
2. High-Precision Priority Encoder Based Integer Division Algorithm;2021 IEEE International Midwest Symposium on Circuits and Systems (MWSCAS);2021-08-09
3. A 32-bit Integer Division Algorithm Based on Priority Encoder;2020 27th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2020-11-23
4. Hardware Divider. Calculation of the Remainder;Proceedings of the 20th International Conference on Computer Systems and Technologies;2019-06-21
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